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J4  2009, Vol. 43 Issue (11): 2000-2005    DOI: 10.3785/j.issn.1008-973X.2009.11.010
    
Integrated circuit design for solar cell maximum power point tracking
ZHANG Dan-yan, WU Xiao-bo, ZHAO Meng-lian, YAN Xiao-lang
(Institute of VLSI Design, Zhejiang University, Hangzhou 310027, China)
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Abstract  

An analog maximum power point tracking (MPPT) controller integrated circuit (IC) based on open-circuit voltage method was proposed to enhance the photovoltaic conversion efficiency of solar cell. Utilizing the near-linear dependence between the open-circuit voltage of solar cell and its maximum power point (MPP) voltage, the IC samples the open-circuit voltage periodically and deduces the corresponding MPP voltage. The IC is featured by simple structure, low cost and good stability. Besides realizing the precise MPPT of solar cell, the chip can sample the open-circuit voltage and renew the current MPP voltage every interval. The real-time monitoring of solar cell output voltage and fast dynamic response to fluctuations of circumstance conditions are also implemented. The chip consists of basic modules like reference, regulator, oscillator and error amplifier as well as the drivers using bootstrap technique, which boosts the output voltage. The circuit was designed, optimized and fabricated by 1.5 μm BCD (Bipolar-CMOS-DMOS) technology with the chip area of about 3.0 mm×2.6 mm. And the test results showed that all expected functions were realized.



Published: 01 November 2009
CLC:  TN 432  
Cite this article:

ZHANG Dan-Yan, TUN Xiao-Bei, DIAO Meng-Lian, et al. Integrated circuit design for solar cell maximum power point tracking. J4, 2009, 43(11): 2000-2005.

URL:

http://www.zjujournals.com/eng/10.3785/j.issn.1008-973X.2009.11.010     OR     http://www.zjujournals.com/eng/Y2009/V43/I11/2000


光伏电池最大功率点跟踪芯片的设计

为提高光伏电池的光电转换效率,设计一种基于开路电压法的光伏电池最大功率点跟踪(MPPT)控制芯片.利用光伏电池开路电压与最大功率点电压存在近似线性关系的特性,周期性采样光伏电池的开路电压,计算得到最大功率点电压.所设计的芯片结构简单、成本低、稳定性好,除能够较精确地控制实现光伏电池的MPPT外,还能周期采样、定时更新当前MPPT电压,并实时监测光伏电池的输出电压,使环境条件变化时系统具有快速的动态响应.芯片除包含参考基准、电压调节器、振荡器及误差放大器等基本模块外,还集成了采用自举技术的驱动电路,提高了输出电压.电路采用1.5 μm双极型-CMOS-DMOS (BCD)工艺设计制造,优化后的芯片面积约为3.0 mm×2.6 mm.测试结果表明,预期的电路功能已经基本实现.

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