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| Digitally controlled active clamp flyback converter with adaptive dead time control |
Ke-feng LIU( ),Jia-bao HE,Jian-xiong XI,Le-nian HE*() |
| Institute of VLSI Design, Zhejiang University, Hangzhou 310027, China |
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Abstract The design technique of the digitally controlled active clamp flyback (ACF) converter based on adaptive dead time control (ADTC) was proposed in order to improve conversion efficiency of the converter. The zero voltage switching (ZVS) information for two primary switches was detected by the secondary-side sampling, then the dead time was controlled adaptively, and the ZVS for switches was achieved. The withstand voltage requirements of sampling device were reduced by the secondary-side sampling. The system design was verified on a 45 W (20 V/2.25 A) prototype of a CoolMOS-based ACF converter, and a field-programmable gate array (FPGA) was used to achieve digital control. Measured results showed that the converter could operate normally at 300 kHz, the dead time was controlled adaptively under 155 V DC voltage input and different loads conditions, and the ZVS for primary switches was achieved. The highest and the lowest efficiency of the system were 97.48% and 92.86 % respectively.
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Received: 04 March 2021
Published: 31 December 2021
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Corresponding Authors:
Le-nian HE
E-mail: liukf@zju.edu.cn;helenian@vlsi.zju.edu.cn
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自适应死区时间控制的数字控制ACF变换器
为了提高有源箝位反激(ACF)变换器的转换效率，提出基于自适应死区时间控制(ADTC)的数字控制ACF变换器设计技术. 通过副边采样检测2个原边功率管的零电压开关(ZVS)信息，实现对死区时间的自适应控制和功率管的ZVS，副边采样使采样器件的耐压要求降低. 基于CoolMOS功率管，开发ACF变换器的45 W (20 V/2.25 A)样机验证系统设计，用现场可编程门阵列(FPGA)实现数字控制. 测试结果表明，变换器在300 kHz开关频率下正常工作，在155 V直流电压输入和不同负载条件下自适应控制死区时间，实现原边功率管的ZVS，系统最高和最低效率分别为97.48%和92.86%.
关键词：
有源箝位反激(ACF),
数字控制,
死区时间控制,
转换效率,
零电压开关(ZVS),
副边采样
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