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浙江大学学报(工学版)
浙江大学学报(工学版)
计算机技术、电子通信技术     
轻量级现场纠正的错误消除寄存器设计
郝子轶, 项晓燕, 陈晨, 孟建熠
1. 浙江大学 电气工程学院,浙江 杭州 310027
2. 复旦大学 微电子学院,上海 201203
Error cancellation flip-flop design with lightweight in-situ error correction
HAO Zi-yi, XIANG Xiao-yan, CHEN Chen, MENG Jian-yi
1. College of Electrical Engineering, Zhejiang University, Hangzhou 310027, China;
2. College of Microelectronics, Fudan University, Shanghai, 201203, China
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摘要：

针对时序错误实时检测和纠正技术中存在的检错成本和纠错性能问题,提出一种基于轻量级现场纠错技术的错误消除寄存器.错误消除寄存器采用自带的内部虚拟节点作为错误检测点,以无额外成本的方式实现时序错误的实时检测；基于观测到的高低电平信息,直接在寄存器内部进行错误纠正,通过仅增加4个额外晶体管的代价,完成即时的现场纠错.错误消除寄存器没有使用复杂的外置翻转探测电路进行错误检测,并且也没有使用额外的存储单元用于错误纠正,因此引入的额外面积和额外功耗极低.为评估错误消除寄存器的时序容错能力和电路效率提升能力,在中芯国际40 nm工艺下将该寄存器集成到商用嵌入式处理器CK802中进行实验.实验结果表明,错误消除寄存器大幅度降低了容错处理器的面积成本和性能损失,相比现有技术,在同电压下有10.9%的性能提升,在同性能下有17.7%的功耗优化.
Abstract:
A lightweight error cancellation flip-flop based on in-situ error correction was proposed to address the problems of cost and performance in timing error detection and correction techniques. Error cancellation flip-flop could detect timing error by observing the build-in virtual rails, thus no additional cost was introduced in error detection. Based on the observed information of input potential, timing error was directly corrected inside the flip-flop and only 4 additional transistors were utilized to accomplish in-situ error correction. Complicated transition detector for error detection and additional storage cell for error correction were not used in error cancellation flip-flop, so the area and power overhead were ultra-low. To evaluate the timing error tolerance ability and the improving capacity of energy efficiency, the flip-flop was applied into a commercial processor CK802 at SMIC 40 nm technology. Experiment results show that error correction flip-flop can largely decrease area overhead and performance loss of timing error tolerance processor. Compared to the existent technique of art error detection and correction, error correction flip-flop increases the performance of processor by 10.9% at fixed supply voltage and decreases the power consumption by 17.7% under fixed throughput.
出版日期: 2017-03-01
CLC:  TN 432  
基金资助:

国家“863”高技术研究发展计划资助项目(2015AA016601-005); 上海市自然科学基金资助项目(15ZR1402700); 专用集成电路与系统国家重点实验室重点资助项目(2015ZD005)
通讯作者: 项晓燕,女,讲师. ORCID: 0000-0002-5602-2749.     E-mail: xiangxy@fudan.edu.cn
作者简介: 郝子轶（1989—）,男,博士生，从事低功耗时序容错处理器研究. ORCID: 0000-0002-4425-8594. E-mail: haozy@vlsi.zju.edu.cn
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郝子轶, 项晓燕, 陈晨, 孟建熠. 轻量级现场纠正的错误消除寄存器设计[J]. 浙江大学学报(工学版), 10.3785/j.issn.1008-973X.2017.03.024.

HAO Zi-yi, XIANG Xiao-yan, CHEN Chen, MENG Jian-yi. Error cancellation flip-flop design with lightweight in-situ error correction. JOURNAL OF ZHEJIANG UNIVERSITY (ENGINEERING SCIENCE), 10.3785/j.issn.1008-973X.2017.03.024.

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