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Design and implementation of FPGA based communication
architecture for control system |
| ZHANG Ankun, WANG Weimin, HU Xiehe, HUANG Wenjun |
National Laboratory of Industrial Control Technology, Institute of CyberSystem and Control,
Zhejiang University, Hangzhou 310027, China |
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Abstract A high efficiency communication architecture applied in distributed control system (control system inner extending bus) was proposed to realize highlyefficient transmission and realtime control, and the design of its bus interface and bus protocol was detailed. The communication architecture, which is mainly consisted of fieldprogrammable gate array (FPGA), complex programmable logic device (CPLD) and ARM7 CPU, implements hot swap on the target with highspeed transmission characteristics. As to the bus interfaces, the dualchannel and parallel communication method increase the systems transmission efficiency, and the redundancy between the two channels helps enhance the reliability of the communication. As to the bus structure, the highlyefficient secondary buffer and electrical expansion make the system very flexible. This communication architecture was put into effect on a system prototype, and the results show that it has high realtime performance and highreliability.
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Published: 14 May 2010
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基于FPGA的控制系统高效通信架构的设计与实现
为实现分布式系统高效数据传输和控制实时性要求,提出一种应用于集散控制系统的实时、高效通信架构（控制系统内部扩展总线）,并且具体地给出总线接口的软硬件设计方法及总线协议的设计方法.通信架构主要由可编程逻辑阵列（FPGA）、复杂可编程逻辑器件（CPLD）及ARM7嵌入式微处理器构成,在保证总线高速传输特性的基础上,实现了目标模块无冲击热插拔.在总线接口上,采用双通道和并行通信设计以提高系统的传输效率,采用通道间热冗余设计以提高总线传输的可靠性；在总线结构上,采用高效的二级缓冲和电气扩展以提高系统的可扩展性和柔性.该架构方案在控制系统原理样机上得到应用验证,结果表明具有良好的实时性和可靠性.
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