| 计算机与通信技术 |
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| 基于共源共栅反相器的极低功耗Sigma-Delta调制器设计 |
| 陈铖颖, 陈黎明, 黄新栋, 张宏怡 |
| 厦门理工学院 微电子学院, 福建 厦门, 361024 |
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| Design of extremely low power sigma-delta modulator based on cascode inverter |
| CHEN Cheng-ying, CHEN Li-ming, HUANG Xin-dong, ZHANG Hong-yi |
| School of Microelectronics, Xiamen University of Technology, Fujian 361024, China |
引用本文:
陈铖颖, 陈黎明, 黄新栋, 张宏怡. 基于共源共栅反相器的极低功耗Sigma-Delta调制器设计[J]. 浙江大学学报(工学版), 2018, 52(6): 1068-1072.
CHEN Cheng-ying, CHEN Li-ming, HUANG Xin-dong, ZHANG Hong-yi. Design of extremely low power sigma-delta modulator based on cascode inverter. JOURNAL OF ZHEJIANG UNIVERSITY (ENGINEERING SCIENCE), 2018, 52(6): 1068-1072.
链接本文:
http://www.zjujournals.com/eng/CN/10.3785/j.issn.1008-973X.2018.06.004
或
http://www.zjujournals.com/eng/CN/Y2018/V52/I6/1068
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| [1] WANG Y C, KE K R, QIN W H, et al. A low power low noise analog front end for portable healthcare system[J]. Journal of Semiconductors, 2015, 36(10):105008-7.
[2] MAO Y Q, GAO T Q, XU X D, et al. A fully integrated CMOS super-regenerative wake-up receiver for EEG applications[J]. Journal of Semiconductors, 2016,37(9):095001-6.
[3] XIAO G L, QIN Y L, XU W L, et al. Demonstration of a fully differential VGA chip with small THD for ECG acquisition system[J]. Journal of Semiconductors, 2015, 36(10):105005-6.
[4] DUAN J H, LAN C, XU W L, et al. An OTA-C filter for ECG acquisition systems with highly linear range and less passband attenuation[J]. Journal of Semiconductors, 2015, 36(5):055006-6.
[5] DAI L, LIU W K, LU Y, et al. A 410μW, 70 dB SNR high performance analog front-end for portable audioapplication[J]. Journal of Semiconductors, 2014,35(10):105013-6.
[6] PU X F, WAN L, ZHANG H, et al. A low-power portable ECG sensor interface with dry electrodes[J]. Journal of Semiconductors, 2013, 34(5):055002-6.
[7] PUN K P, CHATTERJEE S, KINGET P. A 0.5-V 74-dB SNDR 25kHz CT Sigma-Delta modulator withreturn-to-open DAC[J]. IEEE Journal of Solid-StateCircuits, 2007, 42(3):496-507.
[8] MURMANN B, BOSER B. A 12-bit 75-MS/s pipelined ADC using open-loop residue amplification[J]. IEEE Journal of Solid-State Circuits, 2003, 38(12):2040-2050.
[9] SIGRAGUSA E, GALTON I. A digitally enhanced 1.8-V 15-bit 40-MSample/s CMOS pipelined ADC[J]. IEEE Journal of Solid-State Circuits, 2004, 39(12):2126-2138.
[10] FIORENZA J K, SEPKE T, HOLLOWAY P, et al. Comparator-based switch-capacitor circuits for scaled CMOS technologies[J]. IEEE Journal of Solid-State Circuits, 2006, 41(12):2658-2668.
[11] CHAE Y, HAN G. A low power sigma-delta modulator using class-C inverter[C]//2007 IEEE Symposium on Vlsi Circuits. Kyoto:IEEE, 2007:240-241.
[12] CHAE Y, LEE I, HAN G. A 0.7-V 36-μW 85dB-DR audio Sigma-Delta modulator using class-C inverter[C]//2008 IEEE Solid-State Circuits Conference. San Francisco:IEEE, 2008:490-491.
[13] CHAE Y, HAN G. Low voltage, low power, inverter-based switch-capacitor delta-sigma modulator[J]. IEEE Journal of Solid-State Circuits, 2009,44(2):458-471.
[14] ANDREW M, GRAY P R. A 1.5-V, 10-bit, 14.3-MS/s CMOS pipeline analog-to-digital converter[J]. Journal of Solid-State Circuits,1999,34(5):599-603.
[15] ABIRI E, POUMOORI N. A 0.5-V 17μW second-order Delta-Sigma modulator based on a self-biased digital inverter in 0.13μm CMOS[J]. Journal of Basic and Applied Scientific Rearch, 2012,2(4):3476-3480.
[16] MICHAEL F, STEYAERT M. A 250 mV 7.5μW 61dB SNDR SC Sigma-Delta modulator using near-threshold-voltage-biased inverter amplifier in 130 nm CMOS[J]. IEEE Journal of Solid-State Circuits, 2012, 47(3):709-721.
[17] YANG Y, YANG Y, LU L, et al. Inverter-based second-order Sigma-Delta modulator for smart sensor[J]. Electronics letters, 2013. 49(7):31-32.
[18] YOON Y, ROH H, ROH J. A true 0.4 V Delta-Sigma modulator using a mixed DDA integrator without clock boosted switches[J]. IEEE Transactions on Circuits and Systems-Ⅱ:Express Briefs, 2014, 61(4):229-233. |
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