A high efficiency communication architecture applied in distributed control system (control system inner extending bus) was proposed to realize highlyefficient transmission and realtime control, and the design of its bus interface and bus protocol was detailed. The communication architecture, which is mainly consisted of fieldprogrammable gate array (FPGA), complex programmable logic device (CPLD) and ARM7 CPU, implements hot swap on the target with highspeed transmission characteristics. As to the bus interfaces, the dualchannel and parallel communication method increase the systems transmission efficiency, and the redundancy between the two channels helps enhance the reliability of the communication. As to the bus structure, the highlyefficient secondary buffer and electrical expansion make the system very flexible. This communication architecture was put into effect on a system prototype, and the results show that it has high realtime performance and highreliability.
ZHANG An-Kun, WANG Wei-Min, HU Xie-He. Design and implementation of FPGA based communication
architecture for control system. J4, 2010, 44(4): 659-664.
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