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Front. Inform. Technol. Electron. Eng.  2011, Vol. 12 Issue (9): 743-753    DOI: 10.1631/jzus.C1100040
    
Efficient implementation of a cubic-convolution based image scaling engine
Xiang Wang, Yong Ding*, Ming-yu Liu, Xiao-lang Yan
Institute of VLSI Design, Zhejiang University, Hangzhou 310027, China
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Abstract  In video applications, real-time image scaling techniques are often required. In this paper, an efficient implementation of a scaling engine based on 4×4 cubic convolution is proposed. The cubic convolution has a better performance than other traditional interpolation kernels and can also be realized on hardware. The engine is designed to perform arbitrary scaling ratios with an image resolution smaller than 2560×1920 pixels and can scale up or down, in horizontal or vertical direction. It is composed of four functional units and five line buffers, which makes it more competitive than conventional architectures. A strict fixed-point strategy is applied to minimize the quantization errors of hardware realization. Experimental results show that the engine provides a better image quality and a comparatively lower hardware cost than reference implementations.

Key wordsCubic-convolution      Hardware implementation      Interpolation      Engine     
Received: 18 February 2011      Published: 09 September 2011
CLC:  TN79+1  
  TP752  
Cite this article:

Xiang Wang, Yong Ding, Ming-yu Liu, Xiao-lang Yan. Efficient implementation of a cubic-convolution based image scaling engine. Front. Inform. Technol. Electron. Eng., 2011, 12(9): 743-753.

URL:

http://www.zjujournals.com/xueshu/fitee/10.1631/jzus.C1100040     OR     http://www.zjujournals.com/xueshu/fitee/Y2011/V12/I9/743


Efficient implementation of a cubic-convolution based image scaling engine

In video applications, real-time image scaling techniques are often required. In this paper, an efficient implementation of a scaling engine based on 4×4 cubic convolution is proposed. The cubic convolution has a better performance than other traditional interpolation kernels and can also be realized on hardware. The engine is designed to perform arbitrary scaling ratios with an image resolution smaller than 2560×1920 pixels and can scale up or down, in horizontal or vertical direction. It is composed of four functional units and five line buffers, which makes it more competitive than conventional architectures. A strict fixed-point strategy is applied to minimize the quantization errors of hardware realization. Experimental results show that the engine provides a better image quality and a comparatively lower hardware cost than reference implementations.

关键词: Cubic-convolution,  Hardware implementation,  Interpolation,  Engine 
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