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浙江大学学报(工学版)
J4  2013, Vol. 47 Issue (7): 1225-1231    DOI: 10.3785/j.issn.1008-973X.2013.07.014
    
Low voltage ultra-low power delta-sigma modulator
ZHAO Jin-chen, ZHAO Meng-lian, WU Xiao-bo
Institute of VLSI Design, Zhejiang University, Hangzhou 310027, China
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Abstract  

 A switched-opamp (SO) based delta-sigma modulator with novel data weighted averaging (DWA) technique was presented in order to achieve a high resolution low power consumption delta-sigma analog-to-digital converter (ADC) under the constraint of low supply voltage. The proposed SO structure operated only during a half clock phase under a sub-1 V supply voltage, which effectively reduced the power consumption of the system. The opamp-shared technique was applied to save the hardware overhead. Due to the use of dual cycle shift data weighted averaging (DCS-DWA) technique, the nonlinear distortion caused by units mismatch in the feedback loop of the modulator was removed without introducing signal-dependent tones, so that the resolution of the system could be improved. The proposed delta-sigma modulator was implemented in a SMIC 0.18 μm 1P6M process. The measured dynamic range and peak signal to noise and distortion ratio (SNDR) were 94.6 dB and 92.5 dB, respectively, and the core area of the modulator was 0.72 mm2. The total power consumption was 56 μW when a 0.9 V supply voltage was provided, and the figure-of-merit (FoM) was only 34.2 fJ/c-step. The measurement results showed that the expected specifications were achieved．

Published: 01 July 2013
CLC:  TN 453  
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Cite this article:

ZHAO Jin-chen, ZHAO Meng-lian, WU Xiao-bo. Low voltage ultra-low power delta-sigma modulator. J4, 2013, 47(7): 1225-1231.

URL:

http://www.zjujournals.com/eng/10.3785/j.issn.1008-973X.2013.07.014     OR     http://www.zjujournals.com/eng/Y2013/V47/I7/1225


低电源电压超低功耗Delta-Sigma调制器

为了在低电源电压约束下实现delta-sigma模数转换器（ADC）的低功耗与高精度设计,提出基于开关型运放以及新颖DWA技术的delta-sigma调制器.其中的开关型运放仅工作于半周期相位,可以在低于1 V的电源电压下正常工作,节省了系统功耗.调制器的积分器采用运放分享技术,以降低硬件开销.采用双向循环移位数据加权平均（DCS-DWA）技术,在抑制调制回路中匹配单元误差引起的非线性失真的同时消除了与输入信号相关的寄生音调,提高系统分辨率.提出的delta-sigma调制器在SMIC 0.18 μm 1P6M工艺下流片,动态范围与峰值SNDR分别达94.6和92.5 dB,芯片面积为0.72 mm2.在0.9 V电源电压下,测得系统功耗仅为56 μW,品质因数（FoM）低至34.2 fJ/c-step.结果表明,预期的主要设计目标均已实现．

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