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J4  2009, Vol. 43 Issue (5): 860-863    DOI: 10.3785/j.issn.1008-973X.2009.05.014
    
Design of low power priority coder based on multi-threshold technique
HU Xiao-hui1, ZHANG Hui-xi2, SHEN Ji- zhong1,3
(1. School of Information and Electrical Engineering, Zhejiang University City College, Hangzhou 310015, China;
2. College of Qianjiang, Hangzhou Normal University, Hangzhou 310012, China;
3. Department of Information Science and Electronic Engineering, Zhejiang University, Hangzhou 310027, China)
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Abstract  

Multi-threshold CMOS is a new technique to reduce the power dissipation. According to the principle of multi-threshold CMOS (MT-CMOS), multi-threshold combinational  logic unit circuits were designed, and a low power priority coder was designed by MT-CMOS and redundancy-restraining technique. The high threshold voltage NMOS devices were  controlled by higher priority inputs to restrain the redundancy of the priority encoder and reduce the leakage current without any other controlling signal. Simulation based on  the 0.18 μm standard suggested that the designed multi-threshold priority coder not only had correct logic function, but also reduced the leakage power and saved about 19%  power compared with the existing redundancy-restraining priority coder, and saved 49% power compared with the conventional priority coder.



Published: 18 November 2009
CLC:  TN432  
Cite this article:

HU Xiao-Hui, ZHANG Hui-Xi, CHEN Ji-Zhong. Design of low power priority coder based on multi-threshold technique. J4, 2009, 43(5): 860-863.

URL:

http://www.zjujournals.com/eng/10.3785/j.issn.1008-973X.2009.05.014     OR     http://www.zjujournals.com/eng/Y2009/V43/I5/860


基于多阈值技术的低功耗优先编码器设计

多阈值CMOS技术是一种新的降低电路功耗的设计技术.根据多阈值CMOS电路设计原理,设计了多阈值组合逻辑单元电路,并将多阈值技术与冗余抑制技术结合起来,设计了多阈值优先编码器,通过将高阈值NMOS管的控制信号用较高优先权的输入信号进行控制,抑制了优先编码器的冗余现象,控制了电路的漏电流,且无须增加控制信号.采用0.18μm工艺参数进行模拟,结果表明,所设计的多阈值优先编码器具有正确的逻辑功能,在相同的参数条件和输入信号下,与已有的冗余抑制优先编码器相比,节省约19%的功耗;与传统的优先编码器相比,节省了约49%的功耗.

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