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孙颖, 朱大中
浙江大学 信息与电子工程学系,浙江 杭州 310027
Design and research of SOI trench isolated LAPS array
SUN Ying, ZHU Da zhong
Department of Information Science and Electronic Engineering, Zhejiang University, Hangzhou 310027, China
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提出新型隔离结构的光寻址电位传感器(LAPS)阵列.该传感器采用P型绝缘体上的硅(SOI)衬底,利用SOI顶硅层中的硅隔离槽结合重掺杂P+ 区进行相邻阵列单元的隔离.SOI LAPS阵列的ISE TCAD仿真结果表明,与传统的厚氧隔离和重掺杂隔离方法相比,槽隔离结构可以有效地改善相邻阵列单元的噪声隔离特性.重掺杂隔离LAPS阵列传感器的隔离度为3.5 dB,槽隔离LAPS阵列传感器的隔离度可达180 dB.样品实测结果表明,隔离槽和P+ 双重隔离结构SOI LAPS阵列传感器的隔离度为97.23 dB,厚氧和P+ 双重隔离结构的硅基LAPS阵列传感器隔离度仅为16.48 dB.研究数据证明,SOI隔离槽结合P+ 双重隔离结构具有更好的噪声抑制特性,能够阻止相邻阵列单元的衬底噪声耦合以及来自非敏感区的信号干扰.


A new isolation structure light addressable potentiometric sensor (LAPS) array was proposed. The sensor was fabricated on p type silicon on insulator (SOI) substrate, and separated adjacent array cells with isolation trench and heavy doping P+ regions in top silicon layer. ISE TCAD simulation results of SOI LAPS array show that trench isolation structure can effectively improve noise separation property of adjacent array cells compared with traditional thick oxide or heavy doping methods. The isolation ratio of heavy doping isolated LAPS array is 3.5 dB, while trench isolated LAPS array is 180 dB. Sample test results show that the isolation ratio of trench and P+ double isolated SOI LAPS array is 97.23 dB, while that of thick oxide and P+ double isolated silicon LAPS array is only 16.48 dB. Research data indicate that SOI isolation trench combined with p+ double isolated structure has better noise prevention characteristic. Substrate couple noise of adjacent array cells and noise interferers from non sensitive regions can be prevented.

出版日期: 2016-04-01
:  TN 389  
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孙颖, 朱大中. SOI槽隔离光寻址电位传感器设计与研究[J]. 浙江大学学报(工学版), 10.3785/j.issn.1008-973X.2016.04.024.

SUN Ying, ZHU Da zhong. Design and research of SOI trench isolated LAPS array. JOURNAL OF ZHEJIANG UNIVERSITY (ENGINEERING SCIENCE), 10.3785/j.issn.1008-973X.2016.04.024.


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