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J4  2014, Vol. 48 Issue (2): 268-278    DOI: 10.3785/j.issn.1008-973X.2014.02.013
电信技术     
基于媒体数字信号处理器的流预取机制
叶霞1,2, 辛愿1, 刘勇1, 刘鹏1
1. 浙江大学 信息与电子工程学系,浙江 杭州 310027; 2. 杭州师范大学 钱江学院,浙江 杭州 310016
Stream Prefetcher based on MediaDSP
YE Xia1,2, XIN Yuan1, LIU Yong1, LIU Peng1
1. Department of Information Science and Electronic Engineering, Zhejiang University, Hangzhou 310027, China,
Hangzhou Normal University Qian Tiang College, Hangzhou 310036, China
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摘要:

为了降低数据cache缺失而引起的延迟,提出一种针对媒体数字信号处理器MediaDSP64的一级数据cache优化策略,即基于流信息表的可变步长的最小差值预取,同时给出详细数据分析预取深度、流信息表项数和历史表长度对预取效果的影响,得出最优化的预取参数配置.仿真结果表明,该预取算法在最佳参数配置下针对评测程序H.264、DSP kernel和EEMBC消费类测试集性能分别提高了6%、32%和39%,处理器的平均访存时间分别减少了32%、56%和65%.

Abstract:

In order to reduce cache miss stall penalties, an optimization method for the first level data cache controller of the media digital signal processor MediaDSP64 was proposed, that was prefetching mechanism based on stream table and using the minimum delta stride to prefetch data. Meanwhile, this paper provided a detailed data analysis of how the prefetch distance, the entry of stream table and the length of history table affected the processor performance, and gave the parameter optimization configuration. Simulation results show that the proposed prefetching scheme under optimal parameters can improve H.264, DSP kernel and EEMBC Consumer performance by 6%, 32% and 39%, the average memory access time is decreased by 32%, 56% and 65%, respectively.

出版日期: 2014-02-01
:  TP 302  
基金资助:

国家自然科学基金资助项目(60873112, 61028004);国家“863”高技术研究发展计划资助项目(2009AA01Z109).

通讯作者: 刘鹏,男,副教授     E-mail: liupeng@zju.edu.cn
作者简介: 叶霞(1981—),女,博士生,主要研究方向为媒体数字信号处理器和媒体处理算法.E-mail: yexia810128@yahoo.com.cn
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引用本文:

叶霞,辛愿,刘勇,刘鹏. 基于媒体数字信号处理器的流预取机制[J]. J4, 2014, 48(2): 268-278.

YE Xia, XIN Yuan, LIU Yong, LIU Peng. Stream Prefetcher based on MediaDSP. J4, 2014, 48(2): 268-278.

链接本文:

http://www.zjujournals.com/eng/CN/10.3785/j.issn.1008-973X.2014.02.013        http://www.zjujournals.com/eng/CN/Y2014/V48/I2/268

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