Please wait a minute...
浙江大学学报(工学版)
J4  2014, Vol. 48 Issue (1): 124-129    DOI: 10.3785/j.issn.1008-973X.2014.01.019
电气工程     
动态二进制翻译中的标志位优化算法
王荣华,孟建熠,陈志坚,严晓浪
浙江大学 超大规模集成电路设计研究所,浙江 杭州 310027
Condition code optimization in dynamic binary translation
WANG Rong-hua, MENG Jian-yi, CHEN Zhi-jian, YAN Xiao-lang
Institute of VLSI Design, Zhejiang University, Hangzhou 310027, China
 全文: PDF(935 KB)   HTML
摘要：

为了提高动态翻译器对标志位的模拟与处理效率,针对程序中比例较高的“比较-条件转移”指令对,提出标志位快速映射方法.该方法通过动态识别与提取源程序翻译块内的“比较-条件转移”指令对,利用目标架构的条件依赖关系特征实现“比较-条件转移”指令的高效映射,避免了对这类特殊的标志位定值与引用实施统一而复杂的处理,从而提高动态翻译与执行的速度.基于QEMU的模拟器运行基准程序显示,基于该方法翻译生成的目标标志位处理指令总数比采用其他主流方法减少约20%～90%.
Abstract:

An efficient mapping method named compare and condition branch fast mapping algorithm was proposed in order to improve emulating and processing speed of condition flags. The algorithm mainly focuses on ‘compare and condition branch’ instruction pairs which occupy a large proportion of condition code defining and using instruction pair. The method dynamically identifies and extracts the “compare and condition branch” instruction pair in the source block and completes instruction mapping by using the inherent conditional dependencies of the target machine. By avoiding the complex and uniform traditional processes for these special instruction pairs, dynamic binary translator has achieved great performance improvement. Results of benchmark on QEMU emulator showed that the generated instruction number for translating condition code was reduced by 20% to 90% than that of traditional methods．
出版日期: 2014-01-01
:  TP 314  
基金资助:

 中央高校基本科研业务费资助项目（2012QNA5004）.
通讯作者: 孟建熠，男，讲师.     E-mail: mengjy@vlsi.zju.edu.cn
作者简介: 王荣华（1985-），男，博士生，从事计算机体系结构、二进制转移技术及高性能嵌入式处理器设计的研究. E-mail:ronghua_wang@c-sky.com
服务　　
把本文推荐给朋友
加入引用管理器
E-mail Alert
RSS
作者相关文章　　

引用本文:

王荣华,孟建熠,陈志坚,严晓浪. 动态二进制翻译中的标志位优化算法[J]. J4, 2014, 48(1): 124-129.

WANG Rong-hua, MENG Jian-yi, CHEN Zhi-jian, YAN Xiao-lang. Condition code optimization in dynamic binary translation. J4, 2014, 48(1): 124-129.

链接本文:

http://www.zjujournals.com/eng/CN/10.3785/j.issn.1008-973X.2014.01.019    或    http://www.zjujournals.com/eng/CN/Y2014/V48/I1/124

\
[1\] ALTMAN E R, EBCIOGLU K, GSCHWIND M, et al. Advances and future challenges in binary translation and optimization \
[C\]∥ Proceeding of the IEEE.\
[S.l.\]:IEEE, 2001:17101722.
\
[2\] OTTONI G, HARTIN T, WEAVER C, et al. Harmonia: a transparent, efficient, and harmonious dynamic binary translator targeting the Intel architecture \
[C\]∥ Proceedings of the 8th ACM International Conference on Computing Frontiers. New York: ACM, 2011.
\
[3\] KLAIBER A. The technology behind Crusoe processor \
[EB/OL\]∥ 2000-01-19. http:∥www.cs.ucf.edu/~lboloni/Teaching/EEL5708_2004/slides/paper_aklaiber_19jan00.pdf.
\
[4\] UNG D, CIFUENTES C. Optimising hot paths in a dynamic binary translator \
[C\]∥ 2nd Workshop on Binary Translation. Philadelphia: \
[s.n.\], 2000.
\
[5\] 马湘宁,武成岗，唐锋，等. 二进制翻译中的标志位优化技术\
[J\]. 计算机研究与发展, 2005, 42(2):329337.
MA Xiang-ning，WU Cheng-gang，TANG Feng， et al. Two condition code optimization approaches in binary translation \
[J\]. Journal of Computer Research and Development, 2005, 42(2):329337.
\
[6\] 唐锋,武成岗，冯晓兵，等. 基于动态反馈的标志位线性分析算法\
[J\]. 软件学报, 2007, 18(7): 16031611.
TANG Feng，WU Cheng-gang，FENG Xiao-bing，et al. EfLA algorithm based on dynamic feedback \
[J\]. Journal of Software, 2007, 18(7): 16031611.
\
[7\] HENNESSY J L, PATTERSON D A. Computer architecture: a quantitative approach \
[M\]. 4 th ed. \
[S.l.\]:Morgan Kaufmann, 2006.
\
[8\] C-SKY Microsystems. 32-bit high performance and low power embedded processor \
[EB/OL\]. \
[2010-08-01\]. http:∥www.c-sky.com.
[1] 王荣华, 孟建熠, 陈志坚, 严晓浪. 基于访问区域特征的高速地址翻译方法[J]. J4, 2014, 48(2): 348-353.
[2] 任坤, 严晓浪, 孙玲玲, 翁延玲. 基于改进图染色算法的ASIP寄存器分配器[J]. J4, 2010, 44(12): 2309-2313.