| 电气工程、电信技术 |
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| 基于0.5 μm BCD工艺的双向SCR结构的ESD保护设计 |
| 梁海莲1, 2,董树荣2,顾晓峰1,李明亮2,韩雁2 |
1.江南大学 轻工过程先进控制教育部重点实验室, 江苏 无锡 214122;
2.浙江大学 微电子与光电子研究所,浙江 杭州 310027 |
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| ESD protection design of DDSCR structure based on the 0.5 μm BCD process |
| LIANG Hai-lian1,2, DONG Shu-rong2, GU Xiao-feng1, LI Ming-liang2, HAN Yan2 |
1. Key Laboratory of Advanced Process Control for Light Industry，Ministry of Education, Jiangnan University,
Wuxi, 214122,China;2. Institute of Microelectronics and Optoelectronics, University, Hangzhou, 310027, China |
引用本文:
梁海莲,董树荣,顾晓峰,李明亮,韩雁. 基于0.5 μm BCD工艺的双向SCR结构的ESD保护设计[J]. J4, 2013, 47(11): 2046-2050.
LIANG Hai-lian, DONG Shu-rong, GU Xiao-feng, LI Ming-liang, HAN Yan. ESD protection design of DDSCR structure based on the 0.5 μm BCD process. J4, 2013, 47(11): 2046-2050.
链接本文:
http://www.zjujournals.com/eng/CN/10.3785/j.issn.1008-973X.2013.11.024
或
http://www.zjujournals.com/eng/CN/Y2013/V47/I11/2046
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| ［1］ DI SARRO J P, ROSENBAUM E. A Scalable SCR compact model for ESD circuit simulation［J］. IEEE Transactions on Electron Devices, 2010, 57(12): 3275-3286.
［2］ HUANG C Y, CHIU F C, CHEN Q K, et al. An SCR-Incorporated BJT device for robust ESD protection with high latch up immunity in high-voltage technology ［J］. IEEE Transactions on Device and Materials Reliability, 2012, 12(1): 113-123．
［3］ WANG A Z H, TSAY C H. On a dual-polarity on-chip electrostatic discharge protection structure［J］. IEEE Transctions on Electron Devices, 2001, 48(5): 978-984.
［4］ LIU Z W, VISNSON J, LOU LF, et al. An improved bidirectional SCR structure for low trigger ESD protection applications［J］. IEEE Electron Devices Letters, 2008, 29(4): 360-362．
［5］ BART K, MARKUS P J M, Cong S T, et al. ESD protection solutions for high voltage technologies ［J］. Microelectronics Reliability, 2006, 46(5): 677-688．
［6］ MARKUS P J M, CHRISTIAN C R, KOEN G V, et al. High holding current SCRs (HHI-SCR) for ESD protection and latch-up immune IC operation ［J］. Microelectronics Reliability, 2003, 43(7): 993-1000．
［7］ DONG S R, HAO J, MIAO M, et al. Novel capacitance coupling complementary dual-direction SCR for hign-voltage ESD ［J］. IEEE Electron Device Letters, 2012, 33(5): 640-642．
［8］ DONG S R, WU J, MIAO M, et al. High-holding-voltage silicon-controlled rectifier for ESD applications ［J］. IEEE Electron Device Letters, 2012, 33(10): 1345-1347．
［9］ KER M D, HSIAO Y W . Low capacitance ESD protection design for high-speed I/O interfaces in 130-nm CMOS process ［J］.Microelectronics Reliability, 2009, 49(6): 650-659．
［10］ 朱科翰, 董树荣, 韩雁, 等. 不同栅压下NMOS器件的静电防护性能［J］. 浙江大学学报:工学版, 2010, 44(1): 142144．
ZHU Ke-han, DONG Shu-rong, HAN Yan, et al. ESD protection of NMOS device at different gate bias［J］. Journal of Zhejiang University: Engineering Science, 2010, 44(1): 142-144．
［11］ HAN Y, SONG B, DONG S R, et al. Study of current saturation behaviors in dual direction SCR for ESD applications［J］. Microelectronics Reliability, 2011, 51(2): 332-336.
［12］ CUI Q, HAN Y, DONG S R, et al. A Robust polysilicon-assisted SCR in ESD protection application［J］. Journal of Zhejiang University: Science A, 2007, 8(12): 1879-1883．
［13］ KOO Y, LEE K, KIM K, et al. Design of SCR-based ESD protection device for power clamp using deep-submicron CMOS technology［J］. Microelectronics Journal, 2009, 40(6): 1007-1012．
［14］ TSAI M H, HSU S S H , HSUEH F L, et al. A 24-GHz low-noise amplifier using RF junction varactors for noise optimization and CDM ESD protection in 90 nm CMOS ［J］. IEEE Microwave and Wireless Components Letters, 2011, 21(7): 374-376． |
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