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Front. Inform. Technol. Electron. Eng.  2016, Vol. 17 Issue (11): 1228-1244    DOI: 10.1631/FITEE.1500386
    
A modified simulated annealing algorithm and an excessive area model for floorplanning using fixed-outline constraints
De-xuan Zou, Gai-ge Wang, Gai Pan, Hong-wei Qi
School of Electrical Engineering and Automation, Jiangsu Normal University, Xuzhou 221116, China; School of Computer Science and Technology, Jiangsu Normal University, Xuzhou 221116, China
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Abstract  Outline-free floorplanning focuses on area and wirelength reductions, which are usually meaningless, since they can hardly satisfy modern design requirements. We concentrate on a more difficult and useful issue, fixed-outline floorplanning. This issue imposes fixed-outline constraints on the outline-free floorplanning, making the physical design more interesting and challenging. The contributions of this paper are primarily twofold. First, a modified simulated annealing (MSA) algorithm is proposed. In the beginning of the evolutionary process, a new attenuation formula is used to decrease the temperature slowly, to enhance MSA’s global searching capacity. After a period of time, the traditional attenuation formula is employed to decrease the temperature rapidly, to maintain MSA’s local searching capacity. Second, an excessive area model is designed to guide MSA to find feasible solutions readily. This can save much time for refining feasible solutions. Additionally, B*-tree representation is known as a very useful method for characterizing floorplanning. Therefore, it is employed to perform a perturbing operation for MSA. Finally, six groups of benchmark instances with different dead spaces and aspect ratios—circuits n10, n30, n50, n100, n200, and n300—are chosen to demonstrate the efficiency of our proposed method on fixed-outline floorplanning. Compared to several existing methods, the proposed method is more efficient in obtaining desirable objective function values associated with the chip area, wirelength, and fixed-outline constraints.

Key wordsFixed-outline floorplanning      Modified simulated annealing algorithm      Global search      Excessive area model      B*-tree representation     
Received: 07 November 2015      Published: 07 November 2016
CLC:  TN4  
Cite this article:

De-xuan Zou, Gai-ge Wang, Gai Pan, Hong-wei Qi. A modified simulated annealing algorithm and an excessive area model for floorplanning using fixed-outline constraints. Front. Inform. Technol. Electron. Eng., 2016, 17(11): 1228-1244.

URL:

http://www.zjujournals.com/xueshu/fitee/10.1631/FITEE.1500386     OR     http://www.zjujournals.com/xueshu/fitee/Y2016/V17/I11/1228


基于修正模拟退火算法及溢出面积模型的固定边界布图规划

概要:无边界布图规划研究面积及线长减少问题很难满足现代设计需求,因此通常被认为是无意义的。我们关注一种难度更大且更有意义的问题--固定边界布图规划。该问题将固定边界约束条件加入无边界布图规划中,使其在实体设计中更有趣、更具挑战性。本文的工作主要分为两部分。第一,提出了一种修正模拟退火算法(Modified simulated annealing algorithm, MSA)。在进化过程初期,用一种新的衰减方程来缓慢减小温度,以增强MSA的全局搜索能力。然后,用传统衰减方程来快速减小温度,以维持MSA的局部搜索能力。第二,设计了一种溢出面积模型来引导MSA寻找可行解,为精炼可行解节省了大量时间。另外,B*-tree是一种有效的布图规划表示法,它被用来执行MSA的扰动操作。最后,以六组带有不同空置率及高宽比的benchmark为例,证实本文所提方法在解决固定边界布图规划问题上的效率,这些问题包括电路n10,n30,n50,n100,n200和n300。与几种现有方法相比,本方法能够更有效地获得令人满意的目标函数值,它们与芯片面积、线长和固定边界约束有关。

关键词: 固定边界布图规划,  修正的模拟退火算法,  全局搜索,  溢出面积模型,  B*-tree表示法 
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