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浙江大学学报(工学版)
浙江大学学报(工学版)  2014, Vol. 48 Issue (4): 742-747    DOI: 10.3785/j.issn.1008-973X.2014.04.026
电信技术、自动化技术     
基于自组织映射的手写数字识别的并行实现
王一木1, 潘赟1, 龙彦辰1, 严晓浪1, 宦若虹2
1. 浙江大学 超大规模集成电路设计研究所, 浙江 杭州 310027；
2. 浙江工业大学 计算机科学与技术学院, 浙江 杭州 310023
Parallel implementation of handwritten digit recognition system using self-organizing map
WANG Yi-mu1, PAN Yun1, LONG Yan-chen1, YAN Xiao-lang1, HUAN Ruo-hong2
1. Institute of VLSI Design, Zhejiang University, Hangzhou 310027, China; 2. College of Computer Science and
 Technology, Zhejiang University of Technology, Hangzhou 310023, China
 全文: PDF(1462 KB)  
摘要：

针对自组织映射（SOM）神经网络算法实现复杂的问题,提出SOM算法的简化方案及并行硬件电路架构.经典SOM算法中,权值更新函数须使用浮点数乘法、开方以及指数等运算,硬件并行实现十分困难.传统的SOM简化方法的聚类准确率不高,面对手写数字识别这类复杂应用,传统方法的识别率十分有限.提出的SOM简化算法可以在保证系统聚类准确率的同时,除去权值更新函数中的复杂运算,易于硬件的全并行实现.基于提出的SOM简化算法及并行电路架构,实现的手写数字识别系统的工作频率为50 MHz,单次输入的学习时间仅需200 ns,实时处理性能可达400 MCUPS.识别系统针对MNIST样本库的识别准确率超过81%,与经典SOM算法的准确率持平,明显优于其他SOM简化方法.
关键词：  自组织映射（SOM）;  并行实现;  手写数字识别;  现场可编程门阵列（FPGA）    
Abstract:

A simplified self-organizing map (SOM) algorithm and its parallel hardware architecture were proposed in order to handle the complex problem of hardware implementation of SOM. The weight update function of the conventional SOM contains multiplication, square and exponential operations, which makes parallel realization difficult. Traditional simplified SOM methods have low accuracy on classification, especially when encountering complex applications such as handwritten digit recognition. The proposed SOM algorithm has reduced all complex computations without sacrificing accuracy, and full parallel hardware implementation is possible. The proposed hardware system can proceed at 50 MHz and achieve a performance of 400 MCUPS, which means that learning a single input pattern will take only 200 ns of time. When applying the handwritten digit recognition on the MNIST database, the proposed system can recognize over 81% of the patterns correctly, which is almost the same accuracy as the conventional SOM, but is much better than other simplified SOM methods.
Key words: self-organizing map (SOM)    handwritten digital recognition    field-programmable gate array (FPGA)    parallel implementation
出版日期: 2014-05-04
:  TP 391  
基金资助:

 国家自然科学基金资助项目(61204030)；浙江省自然科学基金资助项目 (LY13F020030, LQ12F04002)；浙江省重中之重学科资助项目.
通讯作者: 潘赟,男,副教授,博导.     E-mail: panyun@vlsi.zju.edu.cn
作者简介: 王一木(1985—),男,博士生,从事数字集成电路、FPGA混合系统设计以及视频/图像处理的研究. E-mail: wangym@vlsi.zju.edu.cn
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引用本文:

王一木, 潘赟, 龙彦辰, 严晓浪, 宦若虹. 基于自组织映射的手写数字识别的并行实现[J]. 浙江大学学报(工学版), 2014, 48(4): 742-747.

WANG Yi-mu, PAN Yun, LONG Yan-chen, YAN Xiao-lang, HUAN Ruo-hong. Parallel implementation of handwritten digit recognition system using self-organizing map. JOURNAL OF ZHEJIANG UNIVERSITY (ENGINEERING SCIENCE), 2014, 48(4): 742-747.

链接本文:

http://www.zjujournals.com/xueshu/eng/CN/10.3785/j.issn.1008-973X.2014.04.026    或    http://www.zjujournals.com/xueshu/eng/CN/Y2014/V48/I4/742

［1］ TEUVO K. The self-organizing map ［C］∥ Proceedings of IEEE. New York: IEEE, 1990, 78(1): 1464-1480.
［2］ 颜学峰, 陈德钊,胡上序.复杂模式保留拓扑的平面映射及其应用［J］. 浙江大学学报：工学版, 2001, 35(5): 529-533.
YAN Xue-feng, CHEN De-zhao, HU Shang-xu. Topology-preserving map of complex patterns group and its application ［J］. Journal of Zhejiang University: Engineering Science, 2001, 35(5): 529-533.
［3］ TEUVO K, SAMUEL K, KRISTA L, et al. Self organization of a massive document collection ［J］. IEEE Transactions on Neural Networks, 2000, 11(3): 574-585.
［4］ SILVEN O, NISKANEN M, KAUPPINEN H. Wood inspection with non-supervised clustering ［J］. Machine Vision and Applications, 2003, 13(5/6): 275-285.
［5］ MUTHURAMALINGAM A, HIMAVATHI S, SRINIVASAN E. Neural network implementation using FPGA: issues and application ［J］. International Journal of Information Technology, 2008, 4(2): 86-92.
［6］ RUPING S, RUCKERT U, GOSER K. Hardware design for self organizing feature maps with binary input vectors ［C］∥ Proceedings of the International Workshop on Artificial Neural Networks. Sitges: Springer, 1993: 488-493.
［7］ JORGE P, MAURICIO V, ANDRES V. Digital hardware architectures of Kohonen’s self organizing feature maps with exponential neighboring function ［C］∥ IEEE International Conference on Reconfigurable Computing and FPGA. Mexico: IEEE, 2006: 1-8.
［8］ YAMAKAWA T, HORIO K, HIRATSUKA T. Advanced self organizing maps using binary weight vector and its digital hardware design ［C］∥ Proceedings of the 9th International Conference on Neural Information. Singapore: IEEE, 2002: 1330-1335.
［9］ APPIAH K, HUNTER A, MENG H Y, et al. A binary self-organizing map and its FPGA implementation ［C］∥ Proceedings of International Joint Conference on Neural Networks. Atlanta: IEEE, 2009: 164-171.
［10］ OMONDI A R, RAJAPAKSE J C. FPGA implementations of neural networks ［M］. Netherlands: Springer, 2006.
［11］ AGUNDIS R, GIRONES G, PALERO C, et al. A mixed hardware software SOFM training system ［J］. Computacióny Sistemas, 2008, 4: 349-356.
［12］ LECUN Y, CORTES C. The MNIST database of handwritten digits ［DB/OL］. http:∥yann.lecun.com/exdb/mnist/.
［13］ APPIAH K, HUNTER A, DICKINSON P, et al. Implementation and applications of tri-state self-organizing maps on FPGA ［J］. IEEE Transactions on Circuits and Systems for Video Technology, 2012, 22(8): 1150-1160.
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