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基于RTD可编程逻辑门的数字电路3层网络综合算法 |
姚茂群1, 杨凯1, 许聪源2, 沈继忠2 |
1. 杭州师范大学 国际服务工程学院, 浙江 杭州 311121; 2. 浙江大学 信息与电子工程学院, 浙江 杭州 310027 |
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Three-layers network synthesis algorithm of digital circuits based on RTD programmable logic gates |
YAO Maoqun1, YANG Kai1, XU Congyuan2, SHEN Jizhong2 |
1. Institute of Service Engineering, Hangzhou Normal University, Hangzhou 311121, China; 2. College of Information Science & Electronic Engineering, Zhejiang University, Hangzhou 310027, China |
引用本文:
姚茂群, 杨凯, 许聪源, 沈继忠. 基于RTD可编程逻辑门的数字电路3层网络综合算法[J]. 浙江大学学报(理学版), 2016, 43(5): 567-572.
YAO Maoqun, YANG Kai, XU Congyuan, SHEN Jizhong. Three-layers network synthesis algorithm of digital circuits based on RTD programmable logic gates. Journal of ZheJIang University(Science Edition), 2016, 43(5): 567-572.
链接本文:
https://www.zjujournals.com/sci/CN/10.3785/j.issn.1008-9497.2016.05.013
或
https://www.zjujournals.com/sci/CN/Y2016/V43/I5/567
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