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| ASIP register allocator based on improved graph-coloring algorithm |
| REN Kun, YAN Xiao-lang, SUN Ling-ling, WENG Yan-ling |
| Institute of VLSI Design, Zhejiang University, Hangzhou 310027, China |
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Abstract A model was presented to describe the complicated restrictions among registers of application specific instruction processor (ASIP) register file, considering that the traditional graph-coloring register allocation cannot produce optimal code for ASIP with irregular structure. The traditional graph-coloring algorithm was improved to be adapted to ASIP according to this model. In the new algorithm, a directed interference graph was built by analyzing the variables‘live range and register constraints. The register allocation was translated into how to simplify this graph. At last the algorithm was applied to an ASIP compiler. Experimental results show that the improved algorithm has better performance of codegeneration and less register spilling than the traditional code-generation algorithm.
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Published: 01 December 2010
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基于改进图染色算法的ASIP寄存器分配器
针对传统的图染色算法很难为不规则结构的专用指令处理器（ASIP）生成优化代码的问题,提出一种能描述ASIP寄存器复杂约束关系的数学模型；改进了传统图染色算法,通过生命周期分析,将各种分配约束限制在一张有向数据相关图中,将寄存器分配问题转化为对有向数据相关图的简化问题；应用改进图染色算法构造了一个ASIP编译器.测试表明：和传统的图染色算法相比,改进图染色算法能充分地考虑寄存器之间的相互约束,降低了目标代码的空间尺寸,减少了寄存器的溢出.
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| ［1］ AHO A V, SETHI R, ULLMAN J D, et al. Compiler: principles, techniques and tools［M］. Boston: AddisonWesley Longman Publishing Co., Inc, 1986.
［2］ BRUNO J, SETHI R. Register allocation for an oneregister machine［R］. Pennsylvania: Pennsylvania State University, 1974.
［3］ CHAITIN G J. Register allocation and spilling via graph coloring［J］. ACM SIGPLAN Notices， 1982, 17(6): 98-105.
［4］ BRIGGS P, COOPER K D, TOREZON L. Improvements to graph coloring register allocation［J］. ACM Transactions on Programming Languages and Systems, 1994, 16(3): 428-455.
［5］ LIAO S, DEVADAS S, KEUTZER K, et al. Code optimization techniques for embedded DSP microprocessors［C］∥ Design Automation Conference. ［S.l.］: ［s.n.］, 1995: 599-604.
［6］ LEUPERS R. Code optimization techniques for embedded processors［M］. Norwell: Kluwer Academic Publishers, 2000.
［7］ KUDRIAVTSEV A, KOGGE P. Generation of permutations for SIMD processors［C］∥ Proceedings of the 2005 ACM SIGPLAN/SIGBED conference on Languages, Compilers, and Tools for Embedded Systems. ［S.l.］： ［s.n.］, 2005: 147-156.
［8］ BRIGGS P. Register allocation via graph coloring ［D］. Houston, USA: RICE University, 1992: 23-32.
［9］ PEREIRA F M, PALSBERG J. Register allocation via coloring of Chordal graphs［C］∥ Proceedings of the 3rd Asian Symposium on Programming Languages and Systems. ［S.l.］: ［s.n.］, 2005: 128-145. |
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