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Design of high performance bandgap reference based on piecewise
temperature curvature compensated technology |
DAI Guo-ding1,2, XU Yang1, LI Wei-min1, HUANG Peng1 |
1.Institute of Electronic CAD, Xidian Uniiversity, Xi’an 710071, China; 2. Key Laboratory of
HighSpeed Circuit Design and EMC, Ministry of EducAtion, Xidian University, Xian 710071, China |
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Abstract A novel piecewise curvature-corrected technology was proposed in this paper to solve the problem that a bandgap voltage reference with high temperature coefficient and low PSRR. In the reference circuit, the whole operating temperature range was divided into three sub-ranges, so that the reference can be compensated by different temperature functions. At the same time, a negative feedback loop was used to improve PSRR at low frequency. Based on the two points mentioned above, the temperature coefficient of 1.24×10-6 over the temperature of -40 ℃ to 150 ℃ and PSRR of -137 dB at DC was achieved. The reference is implemented by TSMC 0.6 μm BCD process, the chip area is 0.5 mm2, the shutdown current is lower than 0.1 μA, and the quiescent dissipation is 125 μW. The designed circuit is validated by the results of the chip test, and the reference voltage skew is less than 0.220 mV under the supply voltage ranging from 2.5 V to 6 V.
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Published: 23 December 2010
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高性能分段温度曲率补偿基准电压源设计
针对带隙基准电压源温漂高、电源抑制比(PSRR)低的问题,提出一种新颖的分段曲率补偿技术.该电路将基准源工作的全温度范围划分为3个区间,对各段温度区间进行不同的温度补偿,同时引入电流环负反馈结构,提高电路在低频时的电源抑制比,实现在-40~150 ℃内,温度系数为124×10-6,在DC时电源抑制比为-137 dB.该电路采用TSMC 0.6 μm BCD工艺设计实现,芯片面积为05 mm2,关断电流小于0.1 μA,工作静态功耗为125 μW.投片测试结果验证了电路设计的正确性,当电源电压为2.5~6.0 V时,该基准源输出电压摆幅仅为0.220 mV.
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[1] ALLEN P E, HOLBERG D R.CMOS analog circuit design [M]. 2nd ed. [S.l.]: Publishing House of Electronics Industry, 2005: 125-130.
[2] SONG B S, GRAY P R. A precision curvature-compensated CMOS bandgap reference [J]. IEEE Journal SolidState Circuits, 1983, 18(6): 634-643.
[3] PALMER C R, DOBKIN R C. A curvature-corrected micropower voltage reference [C]∥Solid-Stated Circuits Conference, Digest of Technical Papers.[S. l.]: IEEE, 1981, 24: 58-59.
[4] RINCONMORA G A, ALLEN P E. A 1.1-V currentmode and piecewise linear curvature corrected bandgap reference [J]. IEEE Journal of SolidState Circuits, 1998, 33(10): 1551-1554.
[5] TAM W S, MOK K Y, WONG O Y, et al. High-performance resistorless sub-1V bandgap reference circuit based on piecewise compensation technique [C]∥IEEE Conference on Electron Devices and Solid-State Circuits. Tainan: IEEE, 2007: 373-376.
[6] HUANG Hongyi, WANG Rujie, HSU Shih- chiang. Piecewise linear curvature-compensated CMOS bandgap reference [C]∥Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems. St.Juliens: IEEE, 2008: 308-311.
[7] 张春茗, 邵志标. 高精度分段曲率校正CMOS带隙基准的设计 [J]. 电子学报, 2007, 35(11): 2193-2197.
ZHANG Chun-ming, SHAO Zhi-biao. Design of precision piecewise curvaturecorrected CMOS bandgap reference [J]. Acta Electronica Sinica, 2007, 35(11): 2193-2197.
[8] 张红南, 曾健平, 田涛. 分段线性补偿型CMOS带隙基准电压源设计[J]. 计测技术, 2006, 26(01): 35-38.
ZHANG Hong-nan, ZENG Jian-ping, TIAN Tao. Design of piecewise compensation CMOS bandgap reference voltage source [J]. Metrology & Measurement Technology, 2006, 26(1): 35-38.
[9] BAI Xiao-he, LU Tie-jun, CAI Wei. A practical curvature-corrected technique for bipolar bandgape reference [C]∥2006 8th International Conference on SolidState and Integrated Circuit Technology, Proceedings. Shanghai: IEEE, 2007: 1714-1717.
[10] XIAO Du, LI Wei-min, ZHU Xiao-fei, et al. A curvature-compensated bandgap reference with improved PSRR [C]∥2005 6th International Conference on ASIC, Proceedings. Shanghai: IEEE, 2005, 2: 529-533.
[11] 苑婷, 巩文超, 何乐年. 高精度、低温度系数带隙基准电压源的设计与实现 [J]. 电子与信息学报, 2009, 31(5): 1260-1263.
YUAN Ting, GONG Wenchao, HE Lenian. Design and realization of a high precision low temperature coefficient bandgap voltage reference [J]. Journal of Electronics and Information Technology, 2009, 31(5): 1260-1263. |
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