自动化技术、计算机技术 |
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基于多阈值技术的低功耗优先编码器设计 |
胡晓慧1,张慧熙2,沈继忠1,3 |
(1.浙江大学城市学院,信息与电气工程学院,浙江 杭州310015;2.杭州师范大学 钱江学院,浙江 杭州 310012; 3.浙江大学 信息与电子工程学系,浙江 杭州 310027) |
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Design of low power priority coder based on multi-threshold technique |
HU Xiao-hui1, ZHANG Hui-xi2, SHEN Ji- zhong1,3 |
(1. School of Information and Electrical Engineering, Zhejiang University City College, Hangzhou 310015, China;
2. College of Qianjiang, Hangzhou Normal University, Hangzhou 310012, China;
3. Department of Information Science and Electronic Engineering, Zhejiang University, Hangzhou 310027, China) |
[1] GHANI T, MISTRY K, PACKAN P, et al. Scaling challenges and device design requirements for high performance sub-50nm gate length planar CMOS transistors [C]∥ Proceedings of International Symposium on VLSI Technology, Systems, and Applications. Honolulu: [s.n.], 2000: 174175.
[2] KANG S M S. Elements of low power design for integrated systems [C]∥ Proceedings of the 2003 International Symposium on Low Power Electronics and Design. Seoul: ACM, 2003: 205210.
[3] LIU Zhi-yu, KURSUN V. Charge recycling MTCMOS for low energy active/sleep mode transitions [C]∥ IEEE International Symposium on Circuits and Systems. New Orleans: IEEE, 2007: 13891392.
[4] ANIS M, AREIBI S, ELMASRY M. Design and optimization of multithreshold CMOS (MT CMOS) circuits [J]. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2003, 22(10): 13241342.
[5] KHANDELWAL V, SRIVASTAVA A. Leakage control through fine-grained placement and sizing of sleep transistors [J]. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2007, 26(7):12461255.
[6] KAO J T, CHANDRAKASAN A P. Dual-threshold voltage techniques for low-power digital circuits [J]. IEEE Journal of Solid-State Circuits, 2000, 35(7): 10091018.
[7] USAMI K, KAWABE M, SETA K, et al. Automated selective multi-threshold design for ultra-low standby applications [C]∥ Proceedings of the 2002 International Symposium on Low Power Electronics and Design. Monterey: ACM, 2002: 202206.
[8] 卢仰坚,吴训威. 抑制冗余优先编码器的逻辑设计[J]. 浙江大学学报:理学版, 2001, 28(4): 468472.
LU Yang-jian, WU Xun-wei. The logic design of priority encoder with redundant-restraining [J]. Journal of Zhejiang University: Science Edition, 2001, 28(4): 468472. |
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