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| Design and realization of balanced Class E/F power amplifier |
| NAN Jing-chang, ZHANG Peng-jun |
| School of Electrics and Information Engineering, Liaoning Technical University, Huludao 125105, China |
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Abstract In order to solve the problem of low efficiency and large loss of input and output return in the designing process of power amplifier, a balanced power amplifier operating in 1.5 GHz was designed. The 3 dB directional coupler was used to distribute and synthesize the RF (radio frequency) signal, which greatly reduced the voltage standing wave ratio (VSWR) of input and output node of the power amplifier, and the harmonic control network of the inverse-Class F power amplifier was introduced into the matching circuit of the Class E power amplifier. The input and output impedance of the transistor was obtained by the use of ADS for load/source pull simulation. Considering the parasitic parameters of the transistor, the second and the third harmonic were matched to open and short respectively at drain of the transistor, and the second harmonic suppression circuit was added into the input circuit to further enhance the efficiency of the power amplifier. The GaN HEMT device CGH40010F transistor was selected for ADS software circuit simulation, and Rogers4350b high-frequency material was used to produce the test board of power amplifier. After making simulation optimization and practical test to the power amplifier, measure results demonstrated that when input power was 28 dBm, the amplifier test board delivered 41.54 dBm output power with drain efficiency of 76.99% and power additional efficiency (PAE) reached 73.59%, input and output node voltage standing wave ratio was less than 2, while having a high efficiency bandwidth of 160 MHz and the maximum output power increased by 3 dB than that of the single tube amplifier. The experimental results had some difference compared with the simulation data, but there was still a good consistency to meet the design index, which verified feasibility of the design methodology. This design method improves design efficiency of the power amplifier, due to the advantages of high efficiency and low return loss, so that it has broad application prospects in present highly efficient and green energy saving RF microwave communication system.
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Received: 06 January 2017
Published: 28 April 2018
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平衡式E/F类功率放大器的设计与实现
为了解决功率放大器设计过程中存在的效率低和输入/输出端回波损耗较大的问题，设计了一种工作频率为1.5 GHz的平衡式功率放大器。通过采用3 dB定向耦合器对射频信号进行分配及合成，大大降低了输入/输出端的驻波系数，并将逆F类功率放大器的谐波控制网络引入E类功率放大器的匹配电路中。使用ADS对晶体管进行负载牵引和源牵引，得到晶体管的输入/输出阻抗，同时结合晶体管的寄生参数，在输出匹配电路中对二次谐波、三次谐波分别进行开路和短路处理，且为了进一步提高功率放大器的工作性能，在输入电路结构中抑制了二次谐波。选用GaN HEMT器件CGH40010F晶体管，利用ADS软件进行电路仿真，并采用Rogers4350b高频板材制作该功率放大器的实际测试电路板。仿真优化和实测表明：在输入功率为28 dBm时，该功率放大器的输出功率为41.54 dBm，漏极效率为76.99%，功率附加效率（power additional efficiency，PAE）达到73.59%，输入/输出端驻波系数小于2，同时具有160 MHz的高效率带宽，且最大输出功率较单管功率放大器提高了3 dB。实测结果与仿真数据有一定的误差，但仍有较好的一致性，满足设计指标要求，验证了设计方法的可行性。该设计方法具有效率高和回波损耗低的优势，提高了功率放大器的设计效率，使它在当今高效绿色节能的射频微波通信系统中具有广阔的应用前景。
关键词：
E类功率放大器,
逆F类功率放大器,
GaN,
平衡结构,
驻波系数
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