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ZJUS-A
Journal of Zhejiang University-SCIENCE A (Applied Physics & Engineering)  2009, Vol. 10 Issue (2): 301-310    DOI: 10.1631/jzus.A0820024
Electrical & Electronic Engineering     
High-performance hardware architecture of elliptic curve cryptography processor over GF(2163)
Yong-ping DAN, Xue-cheng ZOU, Zheng-lin LIU, Yu HAN, Li-hua YI
Department of Electronic Science and Technology, Huazhong University of Science and Technology, Wuhan 430074, China
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Abstract  We propose a novel high-performance hardware architecture of processor for elliptic curve scalar multiplication based on the Lopez-Dahab algorithm over GF(2163) in polynomial basis representation. The processor can do all the operations using an efficient modular arithmetic logic unit, which includes an addition unit, a square and a carefully designed multiplication unit. In the proposed architecture, multiplication, addition, and square can be performed in parallel by the decomposition of computation. The point addition and point doubling iteration operations can be performed in six multiplications by optimization and solution of data dependency. The implementation results based on Xilinx VirtexII XC2V6000 FPGA show that the proposed design can do random elliptic curve scalar multiplication GF(2163) in 34.11 μs, occupying 2821 registers and 13 376 LUTs.

Key words： Elliptic curve cryptography (ECC)      Scalar multiplication      Hardware implementation     
Received: 13 January 2008     
CLC:  TN402  
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Xue-cheng ZOU
Yong-ping DAN
Zheng-lin LIU
Yu HAN
Li-hua YI
Cite this article:

Yong-ping DAN, Xue-cheng ZOU, Zheng-lin LIU, Yu HAN, Li-hua YI. High-performance hardware architecture of elliptic curve cryptography processor over GF(2163). Journal of Zhejiang University-SCIENCE A (Applied Physics & Engineering), 2009, 10(2): 301-310.

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http://www.zjujournals.com/xueshu/zjus-a/10.1631/jzus.A0820024     OR     http://www.zjujournals.com/xueshu/zjus-a/Y2009/V10/I2/301

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