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ZJUS-A
Journal of Zhejiang University-SCIENCE A (Applied Physics & Engineering)  2008, Vol. 9 Issue (6): 822-832    DOI: 10.1631/jzus.A071460
Electrical & Electronic Engineering     
High throughput bandwidth optimized VLSI design for motion compensation in AVS HDTV decoder
Kai LUO, Dong-xiao LI, Ming ZHANG
Department of Information Science and Electronic Engineering, Zhejiang University, Hangzhou 310027, China
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Abstract  In this paper we present a motion compensation (MC) design for the newest Audio Video coding Standard (AVS) of China. Because of compression-efficient techniques of variable block size (VBS) and sub-pixel interpolation, intensive pixel calculation and huge memory access are required. We propose a parallel serial filtering mixed luma interpolation data flow and a three-stage multiplication free chroma interpolation scheme. Compared to the conventional designs, the integrated architecture supports about 2.7 times filtering throughput. The proposed MC design utilizes Vertical Z processing order for reference data re-use and saves up to 30% memory bandwidth. The whole design requires 44.3k gates when synthesized at 108 MHz clock frequency using 0.18-μm CMOS technology and can support up to 1920×1088@30 fps AVS HDTV video decoding.

Key words： Audio Video coding Standard (AVS)      Motion compensation (MC)      Interpolation      VLSI      Architecture     
Received: 30 August 2007      Published: 10 May 2008
CLC:  TN919.8  
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Kai LUO
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Ming ZHANG
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Kai LUO, Dong-xiao LI, Ming ZHANG. High throughput bandwidth optimized VLSI design for motion compensation in AVS HDTV decoder. Journal of Zhejiang University-SCIENCE A (Applied Physics & Engineering), 2008, 9(6): 822-832.

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http://www.zjujournals.com/xueshu/zjus-a/10.1631/jzus.A071460     OR     http://www.zjujournals.com/xueshu/zjus-a/Y2008/V9/I6/822

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