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FITEE
Front. Inform. Technol. Electron. Eng.  2016, Vol. 17 Issue (9): 954-961    DOI: 10.1631/FITEE.1500303
    
A pipelined Reed-Solomon decoder based on a modified step-by-step algorithm
Xing-ru Peng, Wei Zhang, Yan-yan Liu
School of Electronic and Information Engineering, Tianjin University, Tianjin 300072, China; College of Electronic Information and Optical Engineering, Nankai University, Tianjin 300071, China
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Abstract  We propose a pipelined Reed-Solomon (RS) decoder for an ultra-wideband system using a modified step-by-step algorithm. To reduce the complexity, the modified step-by-step algorithm merges two cases of the original algorithm. The pipelined structure allows the decoder to work at high rates with minimum delay. Consequently, for RS(23,17) codes, the proposed architecture requires 42.5% and 24.4% less area compared with a modified Euclidean architecture and a pipelined degree-computationless modified Euclidean architecture, respectively. The area of the proposed decoder is 11.3% less than that of the previous step-by-step decoder with a lower critical path delay.

Key words： Reed-Solomon codes      Step-by-step algorithm      Ultra-wideband      Pipelined structure     
Received: 20 September 2015      Published: 31 August 2016
CLC:  TN79  
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Xing-ru Peng
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Cite this article:

Xing-ru Peng, Wei Zhang, Yan-yan Liu. A pipelined Reed-Solomon decoder based on a modified step-by-step algorithm. Front. Inform. Technol. Electron. Eng., 2016, 17(9): 954-961.

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http://www.zjujournals.com/xueshu/fitee/10.1631/FITEE.1500303     OR     http://www.zjujournals.com/xueshu/fitee/Y2016/V17/I9/954


一款基于改进的步进式译码算法的流水线架构RS码译码器

摘要：基于改进的步进式译码算法，我们为超宽带系统设计了一款流水线架构的Reed-Solomon(RS)码译码器。为了减小复杂度，改进的步进式译码算法将传统步进式译码算法中冗余的两部分进行了结合。此外，采用流水线架构，使得所设计的译码器以最小时延获得最大吞吐率。因此，对于RS（23,17）码，我们所设计的译码器面积比ME（modified Euclidean）架构和pDCME（pipelined degree-computationless modified Euclidean）架构分别减少了42.5%和24.4%。此外，与传统步进式译码器相比，我们设计的译码器能减少11.3%的面积，且关键路径延迟更低。

关键词： Reed-Solomon码,  步进式译码算法,  超宽带,  流水线架构 
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