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Front. Inform. Technol. Electron. Eng.  2012, Vol. 13 Issue (5): 385-392    DOI: 10.1631/jzus.C1100287
    
Design of dual-edge triggered flip-flops based on quantum-dot cellular automata
Lin-rong Xiao, Xie-xiong Chen, Shi-yan Ying
Department of Information Science and Electronic Engineering, Zhejiang University, Hangzhou 310027, China; Department of Electrical and Electronic Engineering, Jiaxing University, Jiaxing 314001, China; College of Information Engineering, Zhejiang University of Technology, Hangzhou 310032, China
Design of dual-edge triggered flip-flops based on quantum-dot cellular automata
Lin-rong Xiao, Xie-xiong Chen, Shi-yan Ying
Department of Information Science and Electronic Engineering, Zhejiang University, Hangzhou 310027, China; Department of Electrical and Electronic Engineering, Jiaxing University, Jiaxing 314001, China; College of Information Engineering, Zhejiang University of Technology, Hangzhou 310032, China
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摘要： Quantum-dot cellular automata (QCA) technology has been widely considered as an alternative to complementary metal–oxide–semiconductor (CMOS) due to QCA’s inherent merits. Many interesting QCA-based logic circuits with smaller feature size, higher operating frequency, and lower power consumption than CMOS have been presented. However, QCA is limited in its sequential circuit design with high performance flip-flops. Based on a brief introduction of QCA and dual-edge triggered (DET) flip-flop, we propose two original QCA-based D and JK DET flip-flops, offering the same data throughput of corresponding single-edge triggered (SET) flip-flops at half the clock pulse frequency. The logic functionality of the two proposed flip-flops is verified with the QCADesigner tool. All the proposed QCA-based DET flip-flops show higher performance than their SET counterparts in terms of data throughput. Furthermore, compared with a previous DET D flip-flop, the number of cells, covered area, and time delay of the proposed DET D flip-flop are reduced by 20.5%, 23.5%, and 25%, respectively. By using a lower clock pulse frequency, the proposed DET flip-flops are promising for constructing QCA sequential circuits and systems with high performance.
关键词： Quantum-dot cellular automata (QCA);  Dual-edge triggered (DET);  Flip-flop;  Sequential circuit    
Abstract: Quantum-dot cellular automata (QCA) technology has been widely considered as an alternative to complementary metal–oxide–semiconductor (CMOS) due to QCA’s inherent merits. Many interesting QCA-based logic circuits with smaller feature size, higher operating frequency, and lower power consumption than CMOS have been presented. However, QCA is limited in its sequential circuit design with high performance flip-flops. Based on a brief introduction of QCA and dual-edge triggered (DET) flip-flop, we propose two original QCA-based D and JK DET flip-flops, offering the same data throughput of corresponding single-edge triggered (SET) flip-flops at half the clock pulse frequency. The logic functionality of the two proposed flip-flops is verified with the QCADesigner tool. All the proposed QCA-based DET flip-flops show higher performance than their SET counterparts in terms of data throughput. Furthermore, compared with a previous DET D flip-flop, the number of cells, covered area, and time delay of the proposed DET D flip-flop are reduced by 20.5%, 23.5%, and 25%, respectively. By using a lower clock pulse frequency, the proposed DET flip-flops are promising for constructing QCA sequential circuits and systems with high performance.
Key words: Quantum-dot cellular automata (QCA)    Dual-edge triggered (DET)    Flip-flop    Sequential circuit
收稿日期: 2011-10-07 出版日期: 2012-05-03
CLC:  TN79  
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引用本文:

Lin-rong Xiao, Xie-xiong Chen, Shi-yan Ying. Design of dual-edge triggered flip-flops based on quantum-dot cellular automata. Front. Inform. Technol. Electron. Eng., 2012, 13(5): 385-392.

链接本文:

http://www.zjujournals.com/xueshu/fitee/CN/10.1631/jzus.C1100287    或    http://www.zjujournals.com/xueshu/fitee/CN/Y2012/V13/I5/385

[1] Mi Lin, Ling-ling Sun. A novel ternary JK flip-flop using the resonant tunneling diode literal circuit[J]. Front. Inform. Technol. Electron. Eng., 2012, 13(12): 944-950.
[2] Mi Lin, Wei-feng Lv, Ling-ling Sun. Design of ternary D flip-flop with pre-set and pre-reset functions based on resonant tunneling diode literal circuit[J]. Front. Inform. Technol. Electron. Eng., 2011, 12(6): 507-514.