基于可变精度脉动阵列结构的卷积神经网络加速器 |
| 秦婷,李钊,闫玉婷,杜亚飞 |
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Convolutional neural network accelerator based on variable-precision systolic-array structure |
| Ting QIN,Zhao LI,Yuting YAN,Yafei DU |
| 图 7 集成可变精度处理单元与先进先出时序对齐组件的脉动阵列总体硬件结构图 |
| Fig.7 Overall hardware architecture of systolic array integrating reconfigurable precision processing elements and FIFO based timing alignment modules |
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