多芯片小数分频锁相环输出信号相位同步设计 |
徐砚天,黄晓敏,李浩明,王志宇,郁发新 |
Design of multi chip fractional frequency phase locked loop output signal phase synchronization |
Yan-tian XU,Xiao-min HUANG,Hao-ming LI,Zhi-yu WANG,Fa-xin YU |
图 2 小数分频PLL相位同步电路结构框图 |
Fig.2 Block diagram of fractional frequency PLL phase synchronization circuit |
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