采用0.18 μm CMOS工艺的高速模拟自适应判决反馈均衡器
High-speed analog-adaptive decision feedback equalizer with 0.18 μm CMOS technology
采用0.18 μm CMOS工艺的高速模拟自适应判决反馈均衡器 |
| 展永政,胡庆生 |
|
High-speed analog-adaptive decision feedback equalizer with 0.18 μm CMOS technology |
| Yong-zheng ZHAN,Qing-sheng HU |
| 图 5 加乘器原理图 |
| Fig.5 Addition-multiplication circuit schematic |
|
|