采用0.18 μm CMOS工艺的高速模拟自适应判决反馈均衡器
High-speed analog-adaptive decision feedback equalizer with 0.18 μm CMOS technology
采用0.18 μm CMOS工艺的高速模拟自适应判决反馈均衡器 |
| 展永政,胡庆生 |
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High-speed analog-adaptive decision feedback equalizer with 0.18 μm CMOS technology |
| Yong-zheng ZHAN,Qing-sheng HU |
| 图 1 符号-符号最小均方（S-S LMS）算法实现框图 |
| Fig.1 Block diagram of sign-sign least mean square (S-S LMS) algorithm |
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