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浙江大学学报(工学版)  2021, Vol. 55 Issue (3): 571-577    DOI: 10.3785/j.issn.1008-973X.2021.03.018
计算机与控制工程     
低功耗差分复用波束合成器的设计
李林楠(),张为*(),党艳杰,李泰安
天津大学 微电子学院,天津 300072
Design of low power differential multiplexing beamformer
Lin-nan LI(),Wei ZHANG*(),Yan-jie DANG,Tai-an LI
College of Microelectronic, Tianjin University, Tianjin 300072, China
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摘要:

为了实现波束合成器与差分馈电天线的直接连接,抑制噪声与干扰,针对传统复用网络架构的高功耗、大面积问题,提出新型差分波束合成架构. 采用差分有源延时单元代替传统架构单向通路上的无源延时单元和缓冲器,与双向通路上的差分无源延时单元结合,形成不同通路之间的固定延时差. 基于 HHNEC 0.18 μm CMOS 工艺,设计四输入四输出的波束合成器对所提架构进行验证. 仿真结果表明,在0.5~1.5 GHz带宽内,延时网络的分辨率为80 ps,最大延时值为720 ps,延时浮动均方根值为29.7 ps,电路的输出反射系数低于?23 dB,输入反射系数低于?10 dB,带内增益为18~21 dB,版图面积为2.96 mm×3.22 mm,在1.8 V电源电压下,总功耗为303 mW. 实验结果证明所提结构具有高精度、面积适中、低功耗和低复杂度的优点.

关键词: 模拟波束合成真延时低功耗差分复用群延时    
Abstract:

A new differential beamformer architecture was proposed to solve the problems of high power consumption and large scale of the traditional multiplexing network architecture, in order to make direct connection between beamformer and differential feed antennas, suppress noise and interference. The differential active delay units were used to replace the passive delay units and buffers on one-way path in the traditional architecture, and combined with the differential passive delay units on two-way path to form the fixed delay time differences among different paths. Based on HHNEC 0.18 μm CMOS technology, a four-input-four-output beamformer was designed to verify the proposed architecture. Simulation showed that in the 0.5—1.5 GHz bandwidth, the resolution of the delay network was 80 ps, the maximum delay value was 720 ps, the delay variation root mean square value was 29.7 ps, the output reflection coefficient of the circuit was lower than –23 dB, the input reflection coefficient was lower than ?10 dB, the in-band synthesis gain was 18—21 dB, the layout area was 2.96 mm × 3.22 mm, and the total power consumption at 1.8 V supply voltage was 303 mW. Experimental results show that the proposed structure has the advantages of high accuracy, moderate scale, low power consumption and low complexity.

Key words: analog beamforming    true time delay    low power consumption    differential multiplexing    group delay
收稿日期: 2020-02-19 出版日期: 2021-04-25
CLC:  TN 432  
基金资助: 国家重点研发计划资助项目(2016YFE0100400)
通讯作者: 张为     E-mail: lilinnan@tju.edu.cn;tjuzhangwei@tju.edu.cn
作者简介: 李林楠(1997—),女,硕士生,从事射频模拟集成电路的研究. orcid.org/0000-0002-7526-783X. E-mail: lilinnan@tju.edu.cn
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引用本文:

李林楠,张为,党艳杰,李泰安. 低功耗差分复用波束合成器的设计[J]. 浙江大学学报(工学版), 2021, 55(3): 571-577.

Lin-nan LI,Wei ZHANG,Yan-jie DANG,Tai-an LI. Design of low power differential multiplexing beamformer. Journal of ZheJiang University (Engineering Science), 2021, 55(3): 571-577.

链接本文:

http://www.zjujournals.com/eng/CN/10.3785/j.issn.1008-973X.2021.03.018        http://www.zjujournals.com/eng/CN/Y2021/V55/I3/571

图 1  波束合成原理图
图 2  常用波束合成架构
图 3  新型差分复用网络架构
输入端口 输出端口
P1 P2 P3 P4
A1 2 $ \tau $ $ 0 $ $ 5\tau $ $ 9\tau $
A2 $ 3\tau $ $ 3\tau $ $ 4\tau $ $ 6\tau $
A3 $ 4\tau $ $ 6\tau $ $ 3\tau $ $ 3\tau $
A4 $ 5\tau $ $ 9\tau $ $ 2\tau $ $ 0 $
表 1  4个输入端口到4个输出端口的延时差
图 4  LC无源延时结构对比
参数 数值 单位 参数 数值 单位
$ {L}_{\mathrm{D}\mathrm{F}1} $ 1.96 nH $ {C}_{1} $ 404.88 fF
$ {L}_{\mathrm{D}\mathrm{F}2} $ 2.15 nH $ {C}_{2} $ 65.56 fF
$ {L}_{3} $ 339.41 pH $ {C}_{3} $ 562.72 fF
$ {L}_{4} $ 2.75 nH $ {C}_{4} $ 400.00 fF
$ {C}_{5} $ 400.00 fF
表 2  3种结构所需的电容和电感
图 5  差分无源延时电路及其等效电路
图 6  理想延时与一阶全通滤波器的传输函数对比
图 7  差分有源延时电路图
图 8  差分低噪声放大器的半边电路图
图 9  缓冲器半边电路图
图 10  波束合成器整体版图
图 11  波束合成器的各个参数后仿真结果
图 12  波束合成器的方向图仿真结果
类别 工艺 带宽/GHz 真延时技术 电路结构 cd Pout rd /ps Rd /ps rdf /% Gb /dB P /mW S /mm2
注:*根据仿真曲线预估得到,**根据延时RMS值计算得到
文献[12] 0.18 μm CMOS 0.50~1.50 LC 单端复用网络 4 4 0~720 80 ? 26 544 13.40
文献[18] 0.18 μm CMOS 0.30~1.00 gm-C 差分链路结构 4 4 0~1 030 103 2.4 25 396 3.80
文献[20] 65.00 nm CMOS 24.25~26.65 gm-C 单端链路结构 1 1 0~13 1 5.8 ? 8 ?
文献[21] 0.18 μm CMOS 0.50~3.00 LC与gm-C 单端链路结构 1 1 0~92 4* 2.4 ?6~?4 25 0.63
本文 0.18 μm CMOS 0.50~1.50 LC与gm-C 差分复用网络 4 4 0~720 80 4.1** 18~21 303 9.60
表 3  波束合成器主要性能对比
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