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J4  2011, Vol. 45 Issue (8): 1502-1508    DOI: 10.3785/j.issn.1008-973X.2011.08.030
电信技术     
三值绝热计数器的开关级设计
汪鹏君1,2, 李昆鹏1, 梅凤娜1, 陈耀武2
1.宁波大学 电路与系统研究所,浙江 宁波 315211;2.浙江大学 数字技术及仪器研究所,浙江 杭州 310027
Design of ternary adiabatic counter on switch-level
WANG Peng-jun1,2, LI Kun-peng1, MEI Feng-na1, CHEN Yao-wu2
1. Institute of Circuits and Systems, Ningbo University, Ningbo 315211, China; 2. Institute of Advanced
Digital Technologies and Instrumentation, Zhejiang University, Hangzhou 310027, China
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摘要:

为了降低多值逻辑电路的功耗,采用开关级设计技术设计一种新型三值绝热计数器.该方案以电路三要素理论为指导,并通过对多值计数器结构及工作原理的分析,分别推导出构成三值绝热计数器的三值绝热触发器、三值绝热正循环门、三值绝热进位电路的开关级函数表达式,利用具有不同阈值的NMOS管和交叉存贮型结构实现相应的电路.将所设计的计数器进行PSPICE模拟,结果表明,三值绝热计数器具有正确的逻辑功能及明显的低功耗特性.

Abstract:

A novel design of ternary adiabatic counter using switch-level design techniques was presented to reduce the power consumption of multi-valued logic circuits. First, by analyzing the working principles and structures of multi-valued counter, the switch-level functional expressions of ternary adiabatic counter which consists of flip-flop, loop operation circuit and carry circuit were derived under the guidance of Three Essential Circuit Elements theory. Then, the four bits ternary adiabatic counter can be realized further by using cross-memory structure and NMOS transistors with different thresholds. Finally, the proposed counter was simulated by PSPICE and the results show that it has correct logic function and distinctive low power dissipation.

出版日期: 2011-09-08
:  TN 79  
基金资助:

国家自然科学基金资助项目(60776022,61076032,60971061);浙江省自然科学基金重点项目(Z1111219);浙江省大学生科技创新团队资助项目.

作者简介: 汪鹏君(1966—),男,教授,从事多值逻辑电路和低功耗集成电路理论及设计方面的研究工作.E-mail: wangpengjun@nbu.edu.cn
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引用本文:

汪鹏君, 李昆鹏, 梅凤娜, 陈耀武. 三值绝热计数器的开关级设计[J]. J4, 2011, 45(8): 1502-1508.

WANG Peng-jun, LI Kun-peng, MEI Feng-na, CHEN Yao-wu. Design of ternary adiabatic counter on switch-level. J4, 2011, 45(8): 1502-1508.

链接本文:

https://www.zjujournals.com/eng/CN/10.3785/j.issn.1008-973X.2011.08.030        https://www.zjujournals.com/eng/CN/Y2011/V45/I8/1502

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