| Electronics & Electrical Engineering |
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| An efficient method for parallel CRC automatic generation |
| CHEN Hong-sheng, ZHANG Wei-cheng, WANG Yong, CHEN Kang-sheng |
| Department of Information Science and Electronic Engineering, Zhejiang University, Hangzhou 310027, China |
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Abstract The State Transition Equation (STE) based method to automatically generate the parallel CRC circuits for any generator polynomial or required amount of parallelism is presented. The parallel CRC circuit so generated is partially optimized before being fed to synthesis tools and works properly in our LAN transceiver. Compared with the cascading method, the proposed method gives better timing results and significantly reduces the synthesis time, in particular.
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Received: 06 July 2002
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