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Journal of Zhejiang University-SCIENCE A (Applied Physics & Engineering)  2009, Vol. 10 Issue (10): 1492-1499    DOI: 10.1631/jzus.A0920290
Computer & Automation     
Novel algorithm for complex bit reversal: employing vector permutation and branch reduction methods
Feng YU, Ze-ke WANG, Rui-feng GE
Department of Instrument Engineering, Zhejiang University, Hangzhou 310027, China
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Abstract  We present novel vector permutation and branch reduction methods to minimize the number of execution cycles for bit reversal algorithms. The new methods are applied to single instruction multiple data (SIMD) parallel implementation of complex data floating-point fast Fourier transform (FFT). The number of operational clock cycles can be reduced by an average factor of 3.5 by using our vector permutation methods and by 1.1 by using our branch reduction methods, compared with conventional implementations. Experiments on MPC7448 (a well-known SIMD reduced instruction set computing processor) demonstrate that our optimal bit-reversal algorithm consistently takes fewer than two cycles per element in complex array operations.

Key wordsBit reversal      Vector permutation      Branch reduction      Single instruction multiple data (SIMD)      Fast Fourier transform (FFT)     
Received: 18 May 2009     
CLC:  TP30  
Cite this article:

Feng YU, Ze-ke WANG, Rui-feng GE. Novel algorithm for complex bit reversal: employing vector permutation and branch reduction methods. Journal of Zhejiang University-SCIENCE A (Applied Physics & Engineering), 2009, 10(10): 1492-1499.

URL:

http://www.zjujournals.com/xueshu/zjus-a/10.1631/jzus.A0920290     OR     http://www.zjujournals.com/xueshu/zjus-a/Y2009/V10/I10/1492

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