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Front. Inform. Technol. Electron. Eng.  2011, Vol. 12 Issue (4): 323-329    DOI: 10.1631/jzus.C1000258
    
An efficient radix-2 fast Fourier transform processor with ganged butterfly engines on field programmable gate arrays
Zhen-guo Ma, Feng Yu*, Rui-feng Ge, Ze-ke Wang
Department of Instrument Engineering, Zhejiang University, Hangzhou 310027, China
An efficient radix-2 fast Fourier transform processor with ganged butterfly engines on field programmable gate arrays
Zhen-guo Ma, Feng Yu*, Rui-feng Ge, Ze-ke Wang
Department of Instrument Engineering, Zhejiang University, Hangzhou 310027, China
 全文: PDF(164 KB)  
摘要： We present a novel method to implement the radix-2 fast Fourier transform (FFT) algorithm on field programmable gate arrays (FPGA). The FFT architecture exploits parallelism by having more pipelined units in the stages, and more parallel units within a stage. It has the noticeable advantages of high speed and more efficient resource utilization by employing four ganged butterfly engines (GBEs), and can be well matched to the placement of the resources on the FPGA. We adopt the decimation-in-frequency (DIF) radix-2 FFT algorithm and implement the FFT processor on a state-of-the-art FPGA. Experimental results show that the processor can compute 1024-point complex radix-2 FFT in about 11 μs with a clock frequency of 200 MHz.
关键词： Ganged butterfly engine (GBE);  Radix-2;  Fast Fourier transform (FFT);  Field programmable gate array (FPGA)    
Abstract: We present a novel method to implement the radix-2 fast Fourier transform (FFT) algorithm on field programmable gate arrays (FPGA). The FFT architecture exploits parallelism by having more pipelined units in the stages, and more parallel units within a stage. It has the noticeable advantages of high speed and more efficient resource utilization by employing four ganged butterfly engines (GBEs), and can be well matched to the placement of the resources on the FPGA. We adopt the decimation-in-frequency (DIF) radix-2 FFT algorithm and implement the FFT processor on a state-of-the-art FPGA. Experimental results show that the processor can compute 1024-point complex radix-2 FFT in about 11 μs with a clock frequency of 200 MHz.
Key words: Ganged butterfly engine (GBE)    Radix-2    Fast Fourier transform (FFT)    Field programmable gate array (FPGA)
收稿日期: 2010-07-21 出版日期: 2011-04-11
CLC:  TN91  
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Zhen-guo Ma
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引用本文:

Zhen-guo Ma, Feng Yu, Rui-feng Ge, Ze-ke Wang. An efficient radix-2 fast Fourier transform processor with ganged butterfly engines on field programmable gate arrays. Front. Inform. Technol. Electron. Eng., 2011, 12(4): 323-329.

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http://www.zjujournals.com/xueshu/fitee/CN/10.1631/jzus.C1000258    或    http://www.zjujournals.com/xueshu/fitee/CN/Y2011/V12/I4/323

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