Investigation into ternary GaAs circuits with buffer function
WAN Xu1 , YANG Fang1 , CHEN Xie-xiong2 ( 1. Department of Physics, Zhejiang Normal University, Jinghua 321004, China; 2. Department of E. E. , Zhejiang University, Hangzhou 310028,China)
Abstract： In this paper, the basic frame of ternary GaAs circuits with buffer function was investigated.
Specially, the logic output circuits of ternary GaAs M ESFET 's w ere discussed. And then, the circuitmodel that is better than that of reference [4] was presented by the results of simulation with PSPICE program. According to this model, the design method of ternary GaAs circuits at switch element level w as presented also.
