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ZJUS-A
Journal of Zhejiang University-SCIENCE A (Applied Physics & Engineering)  2009, Vol. 10 Issue (6): 922-926    DOI: 10.1631/jzus.A0820803
Electrical & Electronic Engineering     
Low-cost fault tolerance in evolvable multiprocessor systems: a graceful degradation approach
Shervin VAKILI, Sied Mehdi FAKHRAIE, Siamak MOHAMMADI, Ali AHMADI
School of Electrical and Computer Engineering, University of Tehran, Tehran 14395-515, Iran
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Abstract  The evolvable multiprocessor (EvoMP), as a novel multiprocessor system-on-chip (MPSoC) machine with evolvable task decomposition and scheduling, claims a major feature of low-cost and efficient fault tolerance. Non-centralized control and adaptive distribution of the program among the available processors are two major capabilities of this platform, which remarkably help to achieve an efficient fault tolerance scheme. This letter presents the operational as well as architectural details of this fault tolerance scheme. In this method, when a processor becomes faulty, it will be eliminated of contribution in program execution in remaining run-time. This method also utilizes dynamic rescheduling capability of the system to achieve the maximum possible efficiency after processor reduction. The results confirm the efficiency and remarkable advantages of the proposed approach over common redundancy based techniques in similar systems.

Key words： Fault tolerance      Multiprocessor system-on-chip (MPSoC)      Genetic algorithm (GA)      Adaptive task scheduling     
Received: 19 November 2008     
CLC:  TN4  
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Shervin VAKILI
Sied Mehdi FAKHRAIE
Siamak MOHAMMADI
Ali AHMADI
Cite this article:

Shervin VAKILI, Sied Mehdi FAKHRAIE, Siamak MOHAMMADI, Ali AHMADI. Low-cost fault tolerance in evolvable multiprocessor systems: a graceful degradation approach. Journal of Zhejiang University-SCIENCE A (Applied Physics & Engineering), 2009, 10(6): 922-926.

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http://www.zjujournals.com/xueshu/zjus-a/10.1631/jzus.A0820803     OR     http://www.zjujournals.com/xueshu/zjus-a/Y2009/V10/I6/922

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